CY7C1303BV18

CY7C1303BV18 is 18-Mbit Burst of 2 Pipelined SRAM manufactured by Cypress.

CY7C1303BV18 Datasheet

Part number	CY7C1303BV18
Download	CY7C1303BV18 Datasheet (PDF)
File Size	677.60 KB
Manufacturer	Cypress
Description	18-Mbit Burst of 2 Pipelined SRAM

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CY7C1303BV18 Distributor

CY7C1303BV18 Description

Separate independent Read and Write data ports Supports concurrent transactions 167-MHz Clock for high bandwidth 2.5 ns Clock-to-Valid access time 2-Word Burst on all accesses Double Data Rate (DDR) interfaces on both Read and Write Ports (data transferred at 333 MHz) @167 MHz Two input clocks (K and K) for precise DDR timing SRAM uses rising edges only Two input clocks for output data (C and C) to minimize...

CY7C1303BV18 Key Features

Separate independent Read and Write data ports
Supports concurrent transactions
167-MHz Clock for high bandwidth
2.5 ns Clock-to-Valid access time
2-Word Burst on all accesses
Double Data Rate (DDR) interfaces on both Read and
Two input clocks (K and K) for precise DDR timing
SRAM uses rising edges only
Two input clocks for output data (C and C) to minimize
Single multiplexed address input bus latches address

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