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CY7C1482BV25 Datasheet (CY7C148xBV25) 72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined Sync SRAM

Manufacturer: Cypress (now Infineon)

Overview: CY7C1480BV25 CY7C1482BV25, CY7C1486BV25 72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined Sync.

Download the CY7C1482BV25 datasheet PDF. This datasheet also includes the CY7C1480BV25 variant, as both parts are published together in a single manufacturer document.

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General Description

The CY7C1480BV25/CY7C1482BV25/CY7C1486BV25[1] SRAM integrates 2M x 36/4M x 18/1M × 72 SRAM cells with advanced synchronous peripheral circuitry and a two-bit counter for internal burst operation.

All synchronous inputs are gated by registers controlled by a positive-edge-triggered Clock Input (CLK).

The synchronous inputs include all addresses, all data inputs, address-pipelining Chip Enable (CE1), depth-expansion Chip Enables (CE2 and CE3), Burst Control inputs (ADSC, ADSP, and ADV), Write Enables (BWX, and BWE), and Global Write (GW).

Key Features

  • Functional.

More Datasheets from Cypress (now Infineon)

Part Number Description
CY7C1482BV33 (CY7C148xBV33) 72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined Sync SRAM
CY7C1482V33 (CY7C1480V33 / CY7C1482V33 / CY7C1486V33) 72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined Sync SRAM
CY7C148 (CY7C148 / CY7C149) 1K x 4 Static RAM
CY7C1480BV25 72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined Sync SRAM
CY7C1480BV33 (CY7C148xBV33) 72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined Sync SRAM
CY7C1480V33 (CY7C1480V33 / CY7C1482V33 / CY7C1486V33) 72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined Sync SRAM
CY7C1481V25 72-Mbit (2M x 36/4M x 18/1M x 72) Flow-Through SRAM
CY7C1481V33 (CY7C1481V33 / CY7C1483V33 / CY7C1487V33) 2M x 36/4M x 18/1M x 72 Flow-Through SRAM
CY7C1483V25 72-Mbit (2M x 36/4M x 18/1M x 72) Flow-Through SRAM
CY7C1483V33 (CY7C1481V33 / CY7C1483V33 / CY7C1487V33) 2M x 36/4M x 18/1M x 72 Flow-Through SRAM