CY9BD10T Datasheet | Cypress

Features 32-bit Arm® Cortex®-M3 Core - Processor version: r2p1 - Up to 144 MHz Frequency Operation - Memory Protection Unit (MPU): improves the reliability of an embedded system - Integrated Nested Vectored Interrupt Controller (NVIC): 1 NMI (non-maskable interrupt) and 48 peripheral interrupts and 16 priority levels - 24-bit System timer (Sys Tick): System timer for OS task management On-chip Memories [Flash memory] - Up to 1 MB - Built-in Flash Accelerator System with 16 KB trace buffer memory The read access to Flash memory can be achieved without wait cycle up to operation frequency of 72 MHz. Even at the operation frequency more than 72 MHz, an equivalent access to Flash memory can be obtained by Flash Accelerator System. - Security function for code protection [SRAM] This Series contain a total of up to 128 KB on-chip SRAM. This is posed of two independent SRAM (SRAM0, SRAM1). SRAM0 is connected to I-code bus and D-code bus of Cortex-M3 core. SRAM1 is connected to System bus. - SRAM0: Up to 64 KB - SRAM1: Up to 64 KB USB Interface (Max 2 channels) USB interface is posed of Device and Host. PLL for USB/Ethernet is built-in, USB clock or Ethernet clock can be generated by multiplication of Main clock. [USB device] - USB2.0 Full-Speed supported - Max 6 End Point supported  End Point 0 is control transfer  End Point 1, 2 can be selected Bulk-transfer, Interrupt- transfer or Isochronous-transfer  End Point 3 to 5 can be selected Bulk-transfer or Interrupt- transfer  End Point 1 to 5 is prised Double Buffers - Endpoint 0, 2 to 5: 64 bytes - Endpoint 1: 256 bytes [USB host] - USB2.0 Full/Low-speed supported - Bulk-transfer, interrupt-transfer and Isochronous-transfer support - USB Device connected/dis-connected automatically detect - IN/OUT token handshake packet automatically - Max 256-byte packet-length supported - Wake-up function supported CAN Interface (Max 2 channels) - patible with CAN Specification 2.0A/B - Maximum transfer rate: 1 Mbps - Built-in 32 message buffer Ethernet -...