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W183-5 - Full Feature Peak Reducing EMI Solution

Datasheet Summary

Description

Output Modulated Frequency: Frequency modulated copy of the input clock (SSON# asserted).

Non-Modulated Output: This pin provides a copy of the reference frequency.

This output will not have the Spread Spectrum feature regardless of the state of logic input SSON#.

Features

  • Cypress PREMIS™ family offering.
  • Generates an EMI optimized clocking signal at the output.
  • Selectable output frequency range.
  • Single 1.25%, 3.75% down or center spread output.
  • Integrated loop filter components.
  • Operates with a 3.3 or 5V supply.
  • Low power CMOS design.
  • Available in 14-pin SOIC (Small Outline Integrated Circuit) Table 1. Modulation Width Selection SS% 0 1 W183 Output Fin ≥ Fout ≥ Fin.
  • 1.25% Fin ≥ Fout.

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Datasheet Details

Part number W183-5
Manufacturer Cypress Semiconductor
File Size 127.54 KB
Description Full Feature Peak Reducing EMI Solution
Datasheet download datasheet W183-5 Datasheet
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W183 Full Feature Peak Reducing EMI Solution Features • Cypress PREMIS™ family offering • Generates an EMI optimized clocking signal at the output • Selectable output frequency range • Single 1.25%, 3.75% down or center spread output • Integrated loop filter components • Operates with a 3.3 or 5V supply • Low power CMOS design • Available in 14-pin SOIC (Small Outline Integrated Circuit) Table 1. Modulation Width Selection SS% 0 1 W183 Output Fin ≥ Fout ≥ Fin – 1.25% Fin ≥ Fout ≥ Fin – 3.75% W183-5 Output Fin + 0.625% ≥ Fin≥ – 0.625% Fin + 1.875% ≥ Fin≥ –1.875% Table 2. Frequency Range Selection FS2 0 0 1 1 FS1 0 1 0 1 Frequency Range 28 MHz ≤ FIN ≤ 38 MHz 38 MHz ≤ FIN ≤ 48 MHz 46 MHz ≤ FIN ≤ 60 MHz 58 MHz ≤ FIN ≤ 75 MHz Key Specifications Supply Voltages: ..............................
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