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DS21Q42 - Enhanced QUAD T1 FRAMER

This page provides the datasheet information for the DS21Q42, a member of the DS2 Enhanced QUAD T1 FRAMER family.

Description

The DS21Q42 is an enhanced version of the DS21Q41B Quad T1 Framer.

The DS21Q42 contains four framers that are configured and read through a common microprocessor compatible parallel port.

Each framer consists of a receive framer, receive elastic store, transmit formatter and transmit elastic store.

Features

  • es Four T1 DS1/ISDN.
  • PRI/J1 framing transceivers All four framers are fully independent Frames to D4, ESF, and SLC.
  • 96 R formats Each of the four framers contain dual two.
  • frame elastic store slip buffers that can connect to asynchronous backplanes up to 8.192 MHz 8.
  • bit parallel control port that can be used directly on either multiplexed or non.
  • multiplexed buses (Intel or Motorola) Extracts and inserts robbed bit signaling Detects and generates yellow (RAI).

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Datasheet preview – DS21Q42

Datasheet Details

Part number DS21Q42
Manufacturer Dallas Semiconducotr
File Size 1.28 MB
Description Enhanced QUAD T1 FRAMER
Datasheet download datasheet DS21Q42 Datasheet
Additional preview pages of the DS21Q42 datasheet.

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Full PDF Text Transcription

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DS21Q42 Enhanced QUAD T1 FRAMER www.dalsemi.com FEATURES Four T1 DS1/ISDN–PRI/J1 framing transceivers All four framers are fully independent Each of the four framers contain dual two– frame elastic store slip buffers that can connect to asynchronous backplanes up to 8.192 MHz 8–bit parallel control port that can be used directly on either multiplexed or non– multiplexed buses (Intel or Motorola) Programmable output clocks for Fractional T1 Fully independent transmit and receive functionality Integral HDLC controller with 64-byte buffers configurable for FDL or DS0 operation Generates and detects in–band loop codes from 1 to 8 bits in length including CSU loop codes Pin compatible with DS21Q44 E1 Enhanced Quad E1 Framer 3.
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