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74AUP2G34 Key Features

  • Advanced Ultra Low Power (AUP) CMOS
  • Supply Voltage Range from 0.8V to 3.6V
  • ±4mA Output Drive at 3.0V
  • Low Static Power Consumption
  • ICC < 0.9µA
  • Low Dynamic Power Consumption
  • CPD = 6pF Typical at 3.6V
  • IOFF Supports Partial-Power-Down Mode Operation
  • ESD Protection per JESD 22
  • Exceeds 200-V Machine Model (A115)

Other 74AUP2G34 Datasheets

Manufacturer Part Number Description
NXP Logo NXP Semiconductors 74AUP2G34 Low-power dual buffer
nexperia Logo Nexperia 74AUP2G34 Low-power dual buffer
nexperia Logo Nexperia 74AUP2G3404 Low-power buffer and inverter
nexperia Logo Nexperia 74AUP2G3407 Low-power single buffer

View all 74AUP2G34 datasheets →

74AUP2G34 Description

The Advanced Ultra Low Power (AUP) CMOS logic family is designed for low power and extended battery life in portable applications. The 74AUP2G34 is posed of two buffers with standard push-pull outputs designed for operation over a power supply range of 0.8V to 3.6V. The device is fully specified for partial power down applications using IOFF.