Full PDF Text Transcription for CAT93C46P (Reference)
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CAT93C46P. For precise diagrams, tables, and layout, please refer to the original PDF.
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CAT93C46P IL08
C-MOS 1024(64x16/128x8)BIT ELECTRICALLY ERASABLE PROM
- TOP VIEW -
CS IN 1 SK IN 2 DI IN 3 DOOUT 4
V DD(+5V) 8 NC 7
ORG 6 GND 5
1 CS
2
3 DI
6 ORG
4 DO
INPUT
CS ; CHIP SELECT DI ; SERIAL DATA INPUT ORG ; BIT CONFIGURATION SELECT SK ; SERIAL CLOCK
OUTPUT
DO ; SERIAL DATA OUTPUT
ORG 0 1
OPEN
BIT CONFIGURATION 128x8 64x16 64x16
0 ; LOW LEVEL 1 ; HIGH LEVEL
6 ORG
MEMORY ARRAY 64X16 BITS / 128X8 BITS
3 DI
DATA REGISTER
1 CS
2 SK
MODE DECODE LOGIC CLOCK GENERATOR
ADDRESS DECODER
OUTPUT BUFFER
4 DO
CAT93C46P Datasheet
