* up to 16 simultaneous inputs and five outputs within a cell that can be fragmented into five independent cells. Each cell has a fanin of 29 including register and control lines (see Figure 3). WDATA RAM Module (1,152 bits) RDATA WADDR RADDR RAM Module (1,152 bits) WDATA RDATA Figure 2: QuickR
QL4016-0CF100C Datasheet (478.65 KB)
QL4016-0CF100C
ETC
478.65 KB
16/000 usable pld gate quickram esp combining performance/ density and embedded ram.
QL4016 QuickRAM Data Sheet 16,000 Usable PLD Gate QuickRAM ESP Combining Performance, Dens.
📁 Related Datasheet
QL4016-0CF100I 16/000 Usable PLD Gate QuickRAM ESP Combining Performance/ Density and Embedded RAM (ETC)
QL4016-0CF100M 16/000 Usable PLD Gate QuickRAM ESP Combining Performance/ Density and Embedded RAM (ETC)
QL4016-0PF100C 16/000 Usable PLD Gate QuickRAM ESP Combining Performance/ Density and Embedded RAM (ETC)
QL4016-0PF100I 16/000 Usable PLD Gate QuickRAM ESP Combining Performance/ Density and Embedded RAM (ETC)
QL4016-0PF100M 16/000 Usable PLD Gate QuickRAM ESP Combining Performance/ Density and Embedded RAM (ETC)
QL4016-0PF144C 16/000 Usable PLD Gate QuickRAM ESP Combining Performance/ Density and Embedded RAM (ETC)
QL4016-0PF144I 16/000 Usable PLD Gate QuickRAM ESP Combining Performance/ Density and Embedded RAM (ETC)
QL4016-0PF144M 16/000 Usable PLD Gate QuickRAM ESP Combining Performance/ Density and Embedded RAM (ETC)
QL4016-0PLC 16/000 Usable PLD Gate QuickRAM ESP Combining Performance/ Density and Embedded RAM (ETC)
QL4016-0PLI 16/000 Usable PLD Gate QuickRAM ESP Combining Performance/ Density and Embedded RAM (ETC)
