Datasheet Details
| Part number | S5933QE |
|---|---|
| Manufacturer | Unknown Manufacturer |
| File Size | 79.69 KB |
| Description | Controller Device Summary |
| Download | S5933QE Download (PDF) |
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| Part number | S5933QE |
|---|---|
| Manufacturer | Unknown Manufacturer |
| File Size | 79.69 KB |
| Description | Controller Device Summary |
| Download | S5933QE Download (PDF) |
|
|
|
: When performing a bus master write to the PCI bus, if only one location of the FIFO remains full, the S5933 deasasserts FRAME# on the next clock to indicate the last data phase is in progress.
If another value is written from the add-on at the right moment, an internal condition may cause IRDY# to remain asserted to sustain the burst, but FRAME# has already been dasserted.
Workaround: Externally synchronizing WRFIFO# or WR# to BPCLK moves the rising edge of the write strobe to prevent this event from occuring.
www.DataSheet4U.com DUPLICATE OF A ORIGINAL DOCUMENT FROM AMCC S5933QE PCI Controller Device Summary www.DataSheet4U.com DUPLICATE OF A ORIGINAL DOCUMENT FROM AMCC S5933 PCI CONTROLLER DEVICE SUMMARY PCI S5933QE Matchmaker Device Summary Revision 2, November 1, 1997 The following are all known device and document variations for the AMCC S5933QE PCI Matchmaker and 1997 device data book.
The workarounds described below are factory suggestions and are not to imply the only or all possible solutions.
Contact your local Field Application Engineer for new workaround developments.
| Brand Logo | Part Number | Description | Manufacturer |
|---|---|---|---|
| AMCC | S5933QE | PCI Interface Device Summary | AMCC |
| AMCC | S5933 | 32-Bit PCI MatchMaker | AMCC |
| Part Number | Description |
|---|---|
| S5990-01 | POSITION SENSITIVE DETECTOR |
| S5991-01 | POSITION SENSITIVE DETECTOR |