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EBE25EC8AAFA - 256MB Unbuffered DDR2 SDRAM DIMM

Description

The EBE25EC8AAFA is 32M words × 72 bits, 1 rank DDR2 SDRAM unbuffered module, mounting 9 pieces of 256M bits DDR2 SDRAM sealed in FBGA (µBGA) package.

Read and write operations are performed at the cross points of the CK and the /CK.

Features

  • 240-pin socket type dual in line memory module (DIMM)  PCB height: 30.0mm  Lead pitch: 1.0mm  Lead-free.
  • 1.8V power supply.
  • Data rate: 533Mbps/400Mbps (max. ).
  • 1.8V (SSTL_18 compatible) I/O.
  • Double-data-rate architecture: two data transfers per clock cycle.
  • Bi-directional, differential data strobe (DQS and /DQS) is transmitted/received with data, to be used in capturing data at the receiver.
  • DQS is edge aligned with data for READs.

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Datasheet Details

Part number EBE25EC8AAFA
Manufacturer Elpida Memory
File Size 227.54 KB
Description 256MB Unbuffered DDR2 SDRAM DIMM
Datasheet download datasheet EBE25EC8AAFA Datasheet

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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PRELIMINARY DATA SHEET www.DataSheet4U.com 256MB Unbuffered DDR2 SDRAM DIMM EBE25EC8AAFA (32M words × 72 bits, 1 Rank) Description The EBE25EC8AAFA is 32M words × 72 bits, 1 rank DDR2 SDRAM unbuffered module, mounting 9 pieces of 256M bits DDR2 SDRAM sealed in FBGA (µBGA) package. Read and write operations are performed at the cross points of the CK and the /CK. This highspeed data transfer is realized by the 4 bits prefetchpipelined architecture. Data strobe (DQS and /DQS) both for read and write are available for high speed and reliable data bus design. By setting extended mode register, the on-chip Delay Locked Loop (DLL) can be set enable or disable. This module provides high density mounting without utilizing surface mount technology.
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