Datasheet4U Logo Datasheet4U.com

74F377 - Octal D-Type Flip-Flop

General Description

The 74F377 has eight edge-triggered, D-type flip-flops with individual D inputs and Q outputs.

The common buffered Clock (CP) input loads all flip-flops simultaneously, when the Clock Enable (CE) is LOW.

The register is fully edge-triggered.

Key Features

  • s Ideal for addressable register.

📥 Download Datasheet

📁 Similar Datasheet

Brand Logo Part Number Description Manufacturer
National Semiconductor Logo 74F377 Octal D Flip-Flop National Semiconductor
Philips Logo 74F377A Octal D-type flip-flop Philips
Texas Instruments Logo 74F377A OCTAL D-TYPE FLIP-FLOP Texas Instruments

More Datasheets from Fairchild (now onsemi)

Part Number Description
74F37 Quad Two-Input NAND Buffer
74F373 Octal Transparent Latch
74F374 Octal D-Type Flip-Flop
74F378 Parallel D-Type Register
74F379 Quad Parallel Register
74F30 8-Input NAND Gate
74F32 Quad 2-Input OR Gate
74F322 Octal Serial/Parallel Register
74F323 Octal Universal Shift/Storage Register
74F350 4-Bit Shifter

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
74F377 Octal D-Type Flip-Flop with Clock Enable April 1988 Revised August 1999 74F377 Octal D-Type Flip-Flop with Clock Enable General Description The 74F377 has eight edge-triggered, D-type flip-flops with individual D inputs and Q outputs. The common buffered Clock (CP) input loads all flip-flops simultaneously, when the Clock Enable (CE) is LOW. The register is fully edge-triggered. The state of each D input, one setup time before the LOW-to-HIGH clock transition, is transferred to the corresponding flip-flop’s Q output. The CE input must be stable only one setup time prior to the LOW-to-HIGH clock transition for predictable operation.