74F377 Overview
Description
The 74F377 has eight edge-triggered, D-type flip-flops with individual D inputs and Q outputs. The common buffered Clock (CP) input loads all flip-flops simultaneously, when the Clock Enable (CE) is LOW.
Key Features
- Specify by appending the suffix letter “X” tot he ordering code
- Logic Symbols Connection Diagram IEEE/IEC © 1999 Fairchild Semiconductor Corporation DS009525 74F377 Unit Loading/Fan Out U.L
