* s 1.65V to 3.6V VCC supply operation s 3.6V tolerant inputs and outputs s tPD 3.8 ns max for 3.0V to 3.6V VCC 4.6 ns max for 2.3V to 2.7V VCC 8.2 ns max for 1.65V to 1.95V VCC s Power-off high impedance inputs and outputs s Uses patented Quiet Series noise/EMI reduction circuitry s Latchup conforms
74ALVC132 Datasheet (73.93 KB)
74ALVC132
Fairchild Semiconductor
73.93 KB
Low voltage quad 2-input nand gate.
74ALVC132 Low Voltage Quad 2-Input NAND Gate with Schmitt Trigger Inputs and 3.6V Tolerant Inputs and Outputs December 2001 Revised December 2001 74.
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