logo

DM74KS112AM Datasheet, Fairchild Semiconductor

DM74KS112AM Datasheet, Fairchild Semiconductor

DM74KS112AM

datasheet Download (Size : 52.01KB)

DM74KS112AM Datasheet

DM74KS112AM outputs equivalent, dual negative-edge-triggered master-slave j-k flip-flop with preset/ clear/ and complementary outputs.

DM74KS112AM

datasheet Download (Size : 52.01KB)

DM74KS112AM Datasheet

Description

This device contains two independent negative-edge-triggered J-K flip-flops with complementary outputs. The J and K data is processed by the flip-flop on the falling edge of the clock pulse. The clock triggering occurs at a voltage level and is not d.

Image gallery

DM74KS112AM Page 1 DM74KS112AM Page 2 DM74KS112AM Page 3

TAGS

DM74KS112AM
Dual
Negative-Edge-Triggered
Master-Slave
J-K
Flip-Flop
with
Preset
Clear
and
Complementary
Outputs
Fairchild Semiconductor

Manufacturer


Fairchild Semiconductor

Related datasheet

DM7400

DM7401

DM7402

DM7403

DM7404

DM7405

DM7406

DM7407

DM7408

DM7409

DM7410

DM74121

DM74121N

Since 2006. D4U Semicon.   |   Contact Us   |   Privacy Policy   |   Purchase of parts