Negative-Edge-Triggered Datasheet | Specifications & PDF Download

DM74LS73A Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flops with Clear and Complementary Outputs August 1986 Revised March 2000 DM74LS73A Dua

(335 views)

SN54/74LS73A DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP The SN54LS / 74LS73A offers individual J, K, clear, and clock inputs. These dual flip-flops are

(227 views)

DM74LS73A Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flops with Clear and Complementary Outputs August 1986 Revised March 2000 DM74LS73A Dua

(195 views)

19.20 20.00 Max 16 9 7.40 Max 6.30 Unit: mm 1 1.3 1.11 Max 8 0.51 Min 2.54 Min 5.06 Max 7.62 2.54 ± 0.25 0.48 ± 0.10 0.25 – 0.05 0° – 15° Hit

(187 views)

DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP The SN54 / 74LS107A is a Dual JK Flip-Flop with individual J, K, Direct Clear and Clock Pulse inputs. Output

(153 views)

DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP The SN54 / 74LS112A dual JK flip-flop features individual J, K, clock, and asynchronous set and clear inputs

(149 views)

SN54/74LS114A DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP The SN54/ 74LS114A offers common clock and common clear inputs and individual J, K, and set in

(140 views)

DM74LS112A Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flop with Preset, Clear, and Complementary Outputs August 1986 Revised March 2000 DM74

(130 views)

DM74S112 Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flop with Preset, Clear, and Complementary Outputs August 1986 Revised April 2000 DM74S1

(49 views)

DM74S112 Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flop with Preset, Clear, and Complementary Outputs August 1986 Revised April 2000 DM74S1

(44 views)

DM54LS107A DM74LS107A Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flops with Clear and Complementary Outputs June 1989 DM54LS107A DM74LS107A

(43 views)

DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP The SN54 / 74LS113A offers individual J, K, set, and clock inputs. These monolithic dual flip-flops are desi

(39 views)

DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP The SN54LS / 74LS73A offers individual J, K, clear, and clock inputs. These dual flip-flops are designed so

(39 views)

TECHNICAL DATA IN74HC112A Dual J-K Flip-Flop with Set and Reset High-Performance Silicon-Gate CMOS The IN74HC112A is identical in pinout to the LS/A

(38 views)

SN54/74LS107A DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP The SN54 / 74LS107A is a Dual JK Flip-Flop with individual J, K, Direct Clear and Clock Pulse

(37 views)

MC74F112 DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP The MC74F112 contains two independent, high-speed JK flip-flops with Direct Set and Clear inputs. S

(37 views)

SN54HC112, SN74HC112 SCLS099H – DECEMBER 1982 – REVISED JUNE 2022 SNx4HC112 Dual J-K Negative-Edge-Triggered Flip-Flops With Clear and Preset 1 Featu

(37 views)

PACKAGE OPTION ADDENDUM www.ti.com 24-Aug-2018 PACKAGING INFORMATION Orderable Device JM38510/07102BEA Status Package Type Package Pins Package

(36 views)

CD54AC112, CD74AC112 DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET SCHS325 – JANUARY 2003 D AC Types Feature 1.5-V to 5.5-V Opera

(36 views)

DM74LS112A Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flop with Preset, Clear, and Complementary Outputs August 1986 Revised March 2000 DM74

(34 views)