Datasheet4U Logo Datasheet4U.com

74LS73 Datasheet - Motorola

74LS73 DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP

SN54/74LS73A DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP The SN54LS / 74LS73A offers individual J, K, clear, and clock inputs. These dual flip-flops are designed so that when the clock goes HIGH, the inputs are enabled and data will be accepted. The logic level of the J and K inputs may be allowed to change when the clock pulse is HIGH and the bistable will perform according to the truth table as long as minimum set-up times are observed. Input data is transferred to the outputs on the negative-go.

74LS73_MotorolaInc.pdf

Preview of 74LS73 PDF
74LS73 Datasheet Preview Page 2 74LS73 Datasheet Preview Page 3

Datasheet Details

Part number:

74LS73

Manufacturer:

Motorola

File Size:

73.83 KB

Description:

Dual jk negative edge-triggered flip-flop.

74LS73 Distributor

📁 Related Datasheet

74LS73 Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flops (Fairchild Semiconductor)

74LS73 Dual J-K Flip-Flops (Hitachi Semiconductor)

74LS73A Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flops (Fairchild Semiconductor)

74LS73A Dual J-K Flip-Flops (Hitachi Semiconductor)

74LS74 LOW-POWER SCHOTTKY (ON Semiconductor)

74LS74 Dual Positive-Edge-Triggered D Flip-Flops (Fairchild Semiconductor)

74LS74 Dual D-type Positive Edge-triggered Flip-Flops (Hitachi Semiconductor)

74LS74 Dual Positive-Edge-Triggered D Flip-Flops (National Semiconductor)

TAGS

74LS73 74LS73 DUAL NEGATIVE EDGE-TRIGGERED FLIP-FLOP Motorola