SN74LS112A
1.28MB
Dual j-k negative-edge-triggered flip-flops.
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SN74LS112A - DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP
(Motorola)
DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP
The SN54 / 74LS112A dual JK flip-flop features individual J, K, clock, and asynchronous set and clear inputs.
SN74LS11 - TRIPLE 3-INPUT AND GATE
(Motorola)
TRIPLE 3-INPUT AND GATE
SN54/74LS11
VCC 14 13 12 11 10
9
8
TRIPLE 3-INPUT AND GATE LOW POWER SCHOTTKY
1234567 GND
GUARANTEED OPERATING RANGES
.
SN74LS11 - TRIPLE 3-INPUT POSITIVE-AND GATES
(Texas Instruments)
SN54LS11, SN54S11,
SN74LS11, SN74S11
TRIPLE 3-INPUT POSITIVE-AND GATES
SDLS131 – APRIL 1985 – REVISED MARCH 1988
PRODUCTION DATA information is curre.
SN74LS113A - DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP
(Motorola)
DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP
The SN54 / 74LS113A offers individual J, K, set, and clock inputs. These monolithic dual flip-flops are desi.
SN74LS114A - DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP
(Motorola)
SN54/74LS114A DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP
The SN54/ 74LS114A offers mon clock and mon clear inputs and individual J, K, and set in.
SN74LS10 - TRIPLE 3-INPUT NAND GATE
(Motorola)
.
SN74LS10 - TRIPLE 3-INPUT POSITIVE-NAND GATES
(Texas Instruments)
SN5410, SN54LS10, SN54S10, SN7410, SN74LS10, SN74S10 TRIPLE 3-INPUT POSITIVE-NAND GATES
SDLS035A – DECEMBER 1983 – REVISED APRIL 2003
PRODUCTION DATA.
SN74LS10 - TRIPLE 3-INPUT NAND GATE
(ON Semiconductor)
SN74LS10
TRIPLE 3-INPUT NAND GATE
VCC 14 13
12
11 10
9
8
1234567 GND
Symbol VCC
Supply Voltage
Parameter
TA Operating Ambient Temperature Ra.
SN74LS107A - DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP
(Motorola)
DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP
The SN54 / 74LS107A is a Dual JK Flip-Flop with individual J, K, Direct Clear and Clock Pulse inputs. Output.
SN74LS107A - DUAL J-K FLIP-FLOPS
(Texas Instruments)
SN54107, SN54LS107A,
SN74107, SN74LS107A
DUAL J-K FLIP-FLOPS WITH CLEAR
SDLS036 – DECEMBER 1983 – REVISED MARCH 1988
PRODUCTION DATA information is c.