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DM74LS109A Datasheet, Fairchild Semiconductor

DM74LS109A Datasheet, Fairchild Semiconductor

DM74LS109A

datasheet Download (Size : 52.34KB)

DM74LS109A Datasheet

DM74LS109A flip-flop equivalent, dual positive-edge-triggered j-k flip-flop.

DM74LS109A

datasheet Download (Size : 52.34KB)

DM74LS109A Datasheet

Description

This device contains two independent positive-edge-triggered J-K flip-flops with complementary outputs. The J and K data is accepted by the flip-flop on the rising edge of the clock pulse. The triggering occurs at a voltage level and is not directly .

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TAGS

DM74LS109A
Dual
Positive-Edge-Triggered
J-K
Flip-Flop
Fairchild Semiconductor

Manufacturer


Fairchild Semiconductor

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