DM74S174 Description
These positive-edge-triggered flip-flops utilize TTL circuitry to implement D-type flip-flop lo gic. All h ave a d irect cle ar input, and the quad (DM74S175) versions.
| Part Number | Description |
|---|---|
| DM74S175 | Hex/Quad D Flip-Flop |
| DM74S10 | Triple 3-Input NAND Gate |
| DM74S11 | Triple 3-Input AND Gate |
| DM74S112 | Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flop |
| DM74S133 | 13-Input NAND Gate |
These positive-edge-triggered flip-flops utilize TTL circuitry to implement D-type flip-flop lo gic. All h ave a d irect cle ar input, and the quad (DM74S175) versions.