FQD3P50 Datasheet | Fairchild Semiconductor

Description These P-Channel enhancement mode power field effect transistors are produced using Fairchild’s proprietary, planar stripe, DMOS technology. This advanced technology has been especially tailored to minimize on-state resistance, provide superior switching performance, and withstand high energy pulse in the avalanche and mutation mode. These devices are well suited for electronic lamp ballast based on plimentary half bridge. D-PAK FQD Series Features - -2.1A, -500V, RDS(on) = 4.9Ω @VGS = -10 V - Low gate charge ( typical 18 n C) - Low Crss ( typical 9.5 p F) - Fast switching - 100% avalanche tested - Improved dv/dt capability - Ro HS pliant I-PAK FQU Series G! ! - - ▶▲ - ! Absolute Maximum Ratings TC = 25°C unless otherwise noted Symbol VDSS ID IDM VGSS EAS IAR EAR dv/dt PD TJ, TSTG TL Parameter Drain-Source Voltage Drain Current - Continuous (TC = 25°C) - Continuous (TC = 100°C) Drain Current - Pulsed (Note 1) Gate-Source Voltage Single Pulsed Avalanche Energy (Note 2) Avalanche...