GS81032AT sram equivalent, 32k x 32 / 1m synchronous burst sram.
* FT pin for user-configurable flow through or pipeline operation
* Single Cycle Deselect (SCD) operation
* 3.3 V +10%/
–5% core power supply <.
* JEDEC-standard 100-lead TQFP or QFP package -150 Pipeline tCycle 6.6 3-1-1-1 tKQ 3.8 IDD 270 Flow tCycle 10.5 Thro.
Applications
The GS81032A is a 1,048,576-bit high performance synchronous SRAM with a 2-bit burst address counter. Although of a type originally developed for Level 2 Cache applications supporting high performance CPUs, the device now finds applicati.
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