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HDMP-0480 - Octal Cell Port Bypass Circuit without Clock and Data Recovery

Download the HDMP-0480 datasheet PDF. This datasheet also covers the HDMP-0480_Hewlett variant, as both devices belong to the same octal cell port bypass circuit without clock and data recovery family and are provided as variant models within a single manufacturer datasheet.

Description

The HDMP-0480 is an Octal Cell Port Bypass Circuit (PBC).

This device minimizes part count, cost and jitter accumulation.

Port Bypass Circuits are used in hard disk arrays constructed in Fibre Channel Arbitrated Loop (FC-AL) configurations.

Features

  • Supports 1.0625 GBd fibre channel operation.
  • Supports 1.25 GBd gigabit Ethernet (GE) operation.
  • Octal cell PBC in one package.
  • Valid amplitude detection on FM_NODE[7] input.
  • Equalizers on all inputs.
  • High speed LVPECL I/O.
  • Buffered Line Logic (BLL) outputs (no external bias resistors required).
  • 0.76 W typical power at Vcc=3.3V.
  • 64 Pin, 10 mm, low cost plastic QFP package.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (HDMP-0480_Hewlett-Packard.pdf) that lists specifications for multiple related part numbers.

Datasheet Details

Part number HDMP-0480
Manufacturer Hewlett-Packard
File Size 144.50 KB
Description Octal Cell Port Bypass Circuit without Clock and Data Recovery
Datasheet download datasheet HDMP-0480 Datasheet

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Other Datasheets by Hewlett-Packard

Part Number Description
HDMP-0482 Octal Cell Port Bypass Circuit
HDMP-0421 Port Bypass Circuits
HDMP-0422 Single Port Bypass Circuit
HDMP-0440 Quad Port Bypass Circuit
HDMP-0450 Quad Port Bypass Circuit

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
www.DataSheet4U.com Agilent HDMP-0480 Octal Cell Port Bypass Circuit without Clock and Data Recovery Data Sheet Features • Supports 1.0625 GBd fibre channel operation • Supports 1.25 GBd gigabit Ethernet (GE) operation • Octal cell PBC in one package • Valid amplitude detection on FM_NODE[7] input • Equalizers on all inputs • High speed LVPECL I/O • Buffered Line Logic (BLL) outputs (no external bias resistors required) • 0.76 W typical power at Vcc=3.3V • 64 Pin, 10 mm, low cost plastic QFP package Applications • RAID, JBOD, BTS cabinets • Four 2:1 muxes • Four 1:2 buffers • 1 = > N gigabit serial buffer • N = > 1 gigabit serial mux Description The HDMP-0480 is an Octal Cell Port Bypass Circuit (PBC). This device minimizes part count, cost and jitter accumulation.
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