74HC91 register equivalent, 8-bit shift register.
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* High Speed Operation: tpd (Data Word Input to Output) = 21 ns typ (CL = 50 pF) High Output Current: Fanout of 10 LSTTL Loads Wide Operating .
This serial-in, serial-out, 8-bit shift register is composed of eight R-S master-slave flip-flops, input gating, and a clock drive. Single-rail data and input control are gated through inputs A and B and an internal inverter to form the complementary.
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