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HM514270D - (HM514170D / HM514270D) Dynamic RAM

Download the HM514270D datasheet PDF (HM514170D included). The manufacturer datasheet provides complete specifications, pinout details, electrical characteristics, and typical applications for (hm514170d / hm514270d) dynamic ram.

Description

The Hitachi HM51(S)4170D, HM51(S)4270D Series are CMOS dynamic RAM organized as 262,144-word × 16-bit.

HM51(S)4170D, HM51(S)4270D Series have realized higher density, higher performance and various functions by employing 0.8 µm CMOS process technology and some new CMOS circuit design technologies.

Features

  • Single 5 V supply: 5 V ± 10%.
  • Access time: 60 ns/70 ns/80 ns (max).
  • Low power dissipation  Active mode: 825 mW/660 mW/578 mW (max) (HM51(S)4170D Series) 825 mW/770 mW/688 mW (max) (HM51(S)4270D Series)  Standby mode: 11 mW (max) 1.1 mW (max) (L-version).
  • Fast page mode capability.
  • Refresh cycles  1024 refresh cycles: 16 ms (HM51(S)4170D Series) 128 ms (L-version) (HM51(S)4170DL Series)  512 refresh cycles: 8 ms (HM51(S)4270D Series) 128 ms (L-ver.

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Note: The manufacturer provides a single datasheet file (HM514170D_HitachiSemiconductor.pdf) that lists specifications for multiple related part numbers.
Other Datasheets by Hitachi Semiconductor

Full PDF Text Transcription

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www.DataSheet4U.com HM514170D, HM514270D Series HM51S4170D, HM51S4270D Series 262,144-word × 16-bit Dynamic RAM ADE-203-672 (Z) Preliminary Rev. 0.0 Oct. 18, 1996 Description The Hitachi HM51(S)4170D, HM51(S)4270D Series are CMOS dynamic RAM organized as 262,144-word × 16-bit. HM51(S)4170D, HM51(S)4270D Series have realized higher density, higher performance and various functions by employing 0.8 µm CMOS process technology and some new CMOS circuit design technologies. The HM51(S)4170D, HM51(S)4270D Series offer fast page mode as a high speed access mode. They have the package variations of standard 400-mil 40-pin plastic SOJ and standard 400-mil 44-pin plastic TSOPII. Internal refresh timer enables HM51S4170D, HM51S4270D Series self refresh operation.
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