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HY57V283220LT Datasheet 4 Banks x 1M x 32Bit Synchronous DRAM

Manufacturer: SK Hynix

Download the HY57V283220LT datasheet PDF. This datasheet also includes the HY5V22F variant, as both parts are published together in a single manufacturer document.

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Note: The manufacturer provides a single datasheet file (HY5V22F_HynixSemiconductor.pdf) that lists specifications for multiple related part numbers.

General Description

and is subject to change without notice.

Hynix Semiconductor Inc.

does not assume any responsibility for use of circuits described.

Overview

www.DataSheet4U.com HY57V283220(L)T(P)/ HY5V22(L)F(P) 4 Banks x 1M x 32Bit Synchronous DRAM Revision History Revision No.

0.1 History Defined Preliminary Specification 1) 2) 3) 4) 5) 6) Modified FBGA Ball Configuration Typo.

Changed Functional Block Diagram from A10 to A11.

Key Features

  • JEDEC standard 3.3V power supply All device pins are compatible with LVTTL interface 86TSOP-II, 90Ball FBGA with 0.8mm of pin pitch All inputs and outputs referenced to positive edge of system clock Data mask function by DQM0,1,2 and 3.
  • Internal four banks operation.
  • Burst Read Single Write operation Programmable CAS Latency ; 2, 3 Clocks.
  • Auto refresh and self refresh 4096 refresh cycles /.

More Datasheets from SK Hynix

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HY57V281620EST Synchronous DRAM Memory 128Mbit (8M x 16bit)
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HY57V281620FLTP Synchronous DRAM Memory 128Mbit (8Mx16bit)