Datasheet4U Logo Datasheet4U.com

ICS87946-01 - LVPECL-TO-LVCMOS/LVTTL CLOCK GENERATOR

Description

The ICS87946-01 is a low skew, ÷1, ÷2 Clock Generator and a member of the HiPerClockS™ HiPerClockS™ family of High Performance Clock Solutions from ICS.

The ICS87946-01 has one LVPECL clock input pair.

The PCLK, nPCLK pair can accept LVPECL, CML, or SSTL input levels.

Features

  • 10 single ended LVCMOS outputs, 7Ω typical output impedance.
  • LVPECL clock input pair.
  • PCLK, nPCLK supports the following input levels: LVPECL, CML, SSTL.
  • Maximum input frequency: 250MHz.
  • Output skew: 200ps (maximum).
  • Part-to-part skew: 500ps (typical).
  • Multiple frequency skew: 350ps (maximum).
  • 3.3V input, outputs may be either 3.3V or 2.5V supply modes.
  • 0°C to 70°C ambient operating temperature.
  • Industrial.

📥 Download Datasheet

Datasheet Details

Part number ICS87946-01
Manufacturer ICS
File Size 184.50 KB
Description LVPECL-TO-LVCMOS/LVTTL CLOCK GENERATOR
Datasheet download datasheet ICS87946-01 Datasheet

📁 Similar Datasheet

  • ICS87972I-147 - 1-TO-12 LVCMOS/LVTTL CLOCK MULTIPLIER/ZERO DELAY BUFFER (Integrated Device Technology)
  • ICS87973I-147 - 1-TO-12 LVCMOS/LVTTL CLOCK MULTIPLIER/ZERO DELAY BUFFER (IDT)
  • ICS87974I - LVCMOS/LVTTL CLOCK GENERATOR (Integrated Circuit Systems)
  • ICS87974I - LVCMOS/LVTTL CLOCK GENERATOR (Integrated Device Technology)
  • ICS87001I-01 - LVCMOS/LVTTL Clock Divider (Integrated Device Technology)
  • ICS87002-05 - 1:2 LVCMOS/LVTTL-to-LVCMOS/LVTTL Zero Delay Buffer (IDT)
  • ICS87004AGT - 1:4/ DIFFERENTIAL-TO-LVCMOS/LVTTL ZERO DELAY CLOCK GENERATOR (Integrated Circuit Systems)
  • ICS87004I - Differential-to-LVCMOS/LVTTL Zero Delay Clock Generator (IDT)
  • ICS87008I - 1-TO-8 DIFFERENTIAL-TO-LVCMOS/LVTTL CLOCK GENERATOR (IDT)
  • ICS8714008I - Zero Delay Buffer/ Clock Generator (Integrated Device Technology)
Other Datasheets by ICS

Full PDF Text Transcription

Click to expand full text
www.DataSheet4U.com PRELIMINARY Integrated Circuit Systems, Inc. LOW SKEW ÷1, ÷2 LVPECL-TO-LVCMOS/LVTTL CLOCK GENERATOR FEATURES • 10 single ended LVCMOS outputs, 7Ω typical output impedance • LVPECL clock input pair • PCLK, nPCLK supports the following input levels: LVPECL, CML, SSTL • Maximum input frequency: 250MHz • Output skew: 200ps (maximum) • Part-to-part skew: 500ps (typical) • Multiple frequency skew: 350ps (maximum) • 3.3V input, outputs may be either 3.3V or 2.5V supply modes • 0°C to 70°C ambient operating temperature • Industrial temperature information available upon request ICS87946-01 GENERAL DESCRIPTION The ICS87946-01 is a low skew, ÷1, ÷2 Clock Generator and a member of the HiPerClockS™ HiPerClockS™ family of High Performance Clock Solutions from ICS.
Published: |