ICS87946-01 generator equivalent, lvpecl-to-lvcmos/lvttl clock generator.
* 10 single ended LVCMOS outputs, 7Ω typical output impedance
* LVPECL clock input pair
* PCLK, nPCLK supports the following input levels: LVPECL, CML, SSTL <.
demanding well defined performance and repeatability.
BLOCK DIAGRAM
PIN ASSIGNMENT
MR/nOE GND GND VDDA VDDA QA0 QA1 QA.
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