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9DBL0455 - PCIe Gen1-5 Clock Fanout Buffers

Download the 9DBL0455 datasheet PDF. This datasheet also covers the 9DBL0255 variant, as both devices belong to the same pcie gen1-5 clock fanout buffers family and are provided as variant models within a single manufacturer datasheet.

Description

The 9DBL0255/9DBL0455 are 2 and 4-output PCIe clock fanout buffers for PCIe Gen1

5 applications.

Both parts have a open drain Loss of Signal (LOS) output to indicate the absence or presence of an input clock.

Features

  • to aid robust designs. Flexible Power Sequencing (FPS) ensures well-defined behavior under various power up scenarios, while Power Down Tolerant (PDT) ESD protection on all input pins allows input pins to be driven before VDD is applied. The 9DBL0255 and 9DBL0455 are spread spectrum compatible and provides direct connection to 85Ω transmission lines. They can also be used in 100Ω environments with simple external series resistors. PCIe Architectures.
  • Common Clocked (CC).
  • Independent Re.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (9DBL0255-IDT.pdf) that lists specifications for multiple related part numbers.

Datasheet Details

Part number 9DBL0455
Manufacturer IDT
File Size 304.09 KB
Description PCIe Gen1-5 Clock Fanout Buffers
Datasheet download datasheet 9DBL0455 Datasheet

📁 Similar Datasheet

Part Number Description Manufacturer
9DBL0455 2 and 4-Output 3.3V PCIe Gen1-5 Clock Fanout Buffers Renesas
9DBL0452 3.3V PCIe Zero Delay Buffer Renesas
9DBL0452 Zero-Delay/Fanout Buffer Renesas
9DBL0452C 2 to 8-Output 3.3V PCIe Zero-Delay/Fanout Buffers Renesas
9DBL0442 3.3V PCIe Zero Delay Buffer Renesas

Other Datasheets by IDT

Part Number Description
9DBL0452 4-Output 3.3V PCIe Zero-delay Buffer
9DBL0453 4-output 3.3V LP-HCSL Zero-Delay Buffer
9DBL04 4-output 3.3V PCIe Zero-delay Buffer
9DBL0442 4-Output 3.3V PCIe Zero-delay Buffer
9DBL0443 4-output 3.3V LP-HCSL Zero-Delay Buffer

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
2 and 4-Output 3.3V PCIe Gen1–5 Clock Fanout Buffers with LOS 9DBL0255/9DBL0455 Datasheet Description The 9DBL0255/9DBL0455 are 2 and 4-output PCIe clock fanout buffers for PCIe Gen1–5 applications. Both parts have a open drain Loss of Signal (LOS) output to indicate the absence or presence of an input clock. The devices implement several additional features to aid robust designs. Flexible Power Sequencing (FPS) ensures well-defined behavior under various power up scenarios, while Power Down Tolerant (PDT) ESD protection on all input pins allows input pins to be driven before VDD is applied. The 9DBL0255 and 9DBL0455 are spread spectrum compatible and provides direct connection to 85Ω transmission lines. They can also be used in 100Ω environments with simple external series resistors.
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