Datasheet4U Logo Datasheet4U.com

ICS854S006I - Differential-to-LVDS Fanout Buffer

General Description

The ICS854S006I is a low skew, high perforICS mance 1-to-6 Differential-to-LVDS Fanout Buffer.

ferential input levels.

The ICS854S006I is characterized to operate from either a 2.5V or a 3.3V power supply.

Key Features

  • Six differential LVDS outputs.
  • One differential clock input pair.
  • CLK, nCLK pair can accept the following differential input levels: LVDS, LVPECL, LVHSTL, SSTL, HCSL.
  • Maximum output frequency: 1.7GHz.
  • Translates any single ended input signal to LVDS levels with resistor bias on nCLK input.
  • Output skew: 55ps (maximum).
  • Propagation delay: 850ps (maximum).
  • Additive phase jitter, RMS: 0.067ps (typical).
  • Full 3.3V or 2.

📥 Download Datasheet

Datasheet Details

Part number ICS854S006I
Manufacturer IDT
File Size 188.52 KB
Description Differential-to-LVDS Fanout Buffer
Datasheet download datasheet ICS854S006I Datasheet

📁 Similar Datasheet

Part Number Description Manufacturer
ICS854S013 1-TO-3 DIFFERENTIAL-TO-LVDS FANOUT BUFFER Integrated Device Technology
ICS854S01I 2:1 Differential-to-LVDS Multiplexer Renesas
ICS854S054I 4:1 Differential-to-LVDS Clock Multiplexer Renesas
ICS854S054I 4:1 Differential-to-LVDS Clock Multiplexer Integrated Device Technology
ICS854S057BI 4:1 or 2:1 LVDS Clock Multiplexer Integrated Device Technology

Other Datasheets by IDT

Part Number Description
ICS854S01I 2:1 Differential-to-LVDS Multiplexer
ICS854S202I Differential-to-LVDS Multiplexer
ICS851S201I 2:2 Differential-to-HCSL Multiplexer
ICS853052 DUAL LVCMOS/LVTTL-TO-DIFFERENTIAL LVPECL MULTIPLEXER
ICS853S006I LVPECL/ECL Fanout Buffer

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
Low Skew, 1-to-6, Differential-toLVDS Fanout Buffer ICS854S006I DATA SHEET GENERAL DESCRIPTION The ICS854S006I is a low skew, high perforICS mance 1-to-6 Differential-to-LVDS Fanout Buffer. HiPerClockS™ The CLK, nCLK pair can accept most standard dif- ferential input levels. The ICS854S006I is characterized to operate from either a 2.5V or a 3.3V power supply. Guaranteed output skew characteristic s make the ICS854S006I ideal for those clock distribution applications demanding well defined performance and r e p e a t a b i l i t y. FEATURES • Six differential LVDS outputs • One differential clock input pair • CLK, nCLK pair can accept the following differential input levels: LVDS, LVPECL, LVHSTL, SSTL, HCSL • Maximum output frequency: 1.