IDT74SSTU32866B buffer equivalent, 1.8v configurable buffer.
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1.8V Operation SSTL_18 style clock and data inputs Differential CLK input Configurable as .
* Along with CSPUA877 DDR2 PLL, provides complete solution for DDR2 DIMMs
DESCRIPTION:
This 25-bit 1:1 / 14-bit .
This 25-bit 1:1 / 14-bit 1:2 configurable registered buffer is designed for 1.7V to 1.9V VDD operation. In the 1:1 pinout configuration, only one device per DIMM is requred to drive nine SDRAM loads. In the 1:2 pinout configuration, two devices per.
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