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IDT8SLVD1208-33I Datasheet

LVDS Output Fanout Buffer

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1:8, LVDS Output Fanout Buffer
IDT8SLVD1208-33I
DATA SHEET
General Description
The IDT8SLVD1208-33I is a high-performance differential LVDS
fanout buffer. The device is designed for the fanout of high-frequency,
very low additive phase-noise clock and data signals. The
IDT8SLVD1208-33I is characterized to operate from a 3.3V power
supply. Guaranteed output-to-output and part-to-part skew
characteristics make the IDT8SLVD1208-33I ideal for those clock
distribution applications demanding well-defined performance and
repeatability. Two selectable differential inputs and eight low skew
outputs are available. The integrated bias voltage reference enables
easy interfacing of single-ended signals to the device inputs. The
device is optimized for low power consumption and low additive
phase noise.
Features
Eight low skew, low additive jitter LVDS output pairs
Two selectable, differential clock input pairs
Differential PCLK, nPCLK pairs can accept the following
differential input levels: LVDS, LVPECL
Maximum input clock frequency: 2GHz (maximum)
LVCMOS/LVTTL interface levels for the control select input
Output skew: 8ps (typical)
Propagation delay: 240ps (typical)
Low additive phase jitter, RMS; fREF = 156.25MHz, VPP = 1V,
10kHz - 20MHz: 82fs (typical)
Maximum device current consumption (IDD):
190mA (maximum) @ 3.465V
3.3V supply voltage
Lead-free (RoHS 6), 28-Lead VFQFN package
-40°C to 85°C ambient operating temperature
Pin Assignment
Q4 22
nQ4 23
Q5 24
nQ5 25
Q6 26
nQ6 27
VDD 28
14 GND
13 nQ0
12 Q0
11 VREF0
10 nPCLK0
9 PCLK0
8 VDD
IDT8SLVD1208-33NBGI REVISION A FEBRUARY 12, 2014
IDT8SLVD1208-33I
28 lead VFQFN
5.0mm x 5.0mm x 0.925mm package body
E-Pad size 3.25mm x 3.25 mm
NB Package
Top View
1 ©2014 Integrated Device Technology, Inc.


Integrated Device Technology Electronic Components Datasheet

IDT8SLVD1208-33I Datasheet

LVDS Output Fanout Buffer

No Preview Available !

IDT8SLVD1208-33I Data Sheet
Block Diagram
PCLK0
nPCLK0
VDD
Pulldown
Pullup + Pulldown
PCLK1
nPCLK1
GND GND
VDD
Pulldown
Pullup + Pulldown
SEL
GND GND
VDD
Pullup + Pulldown
GND
0
1
VREF0
VREF1
Reference
Voltage
Generator
1:4, LVDS OUTPUT FANOUT BUFFER
Q0
nQ0
Q1
nQ1
Q2
nQ2
Q3
nQ3
Q4
nQ4
Q5
nQ5
Q6
nQ6
Q7
nQ7
IDT8SLVD1208-33NBGI REVISION A FEBRUARY 12, 2014
2
©2014 Integrated Device Technology, Inc.


Part Number IDT8SLVD1208-33I
Description LVDS Output Fanout Buffer
Maker IDT
Total Page 21 Pages
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