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IS42VM32160D - 4M x 32Bits x 4Banks Mobile Synchronous DRAM

Description

These IS42/45VM32160D are mobile 536,870,912 bits CMOS Synchronous DRAM organized as 4 banks of 4,194,304 words x 32 bits.

These products are offering fully synchronous operation and are referenced to a positive edge of the clock.

Features

  • JEDEC standard 1.8V power supply.
  • Auto refresh and self refresh.
  • All pins are compatible with LVCMOS interface.
  • 8K refresh cycle / 64ms.
  • Programmable Burst Length and Burst Type - 1, 2, 4, 8 or Full Page for Sequential Burst - 4 or 8 for Interleave Burst.
  • Programmable CAS Latency : 2,3 clocks.
  • All inputs and outputs referenced to the positive edge of the system clock.
  • Data mask function by DQM.
  • Internal 4 banks operat.

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📁 Similar Datasheet

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IS42VS16100C1 512K Words x 16 Bits x 2 Banks (16-MBIT) SYNCHRONOUS DYNAMIC RAM Integrated Silicon Solution
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IS42VS16160D 256-MBIT SYNCHRONOUS DRAM Integrated Silicon Solution
IS42VS16400C1 1 Meg Bits x 16 Bits x 4 Banks (64-MBIT) SYNCHRONOUS DYNAMIC RAM Integrated Silicon Solution
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Other Datasheets by ISSI (now Infineon)

Part Number Description
IS42VM32160E 4M x 32Bits x 4Banks Mobile Synchronous DRAM
IS42VM32100C 512K x 32Bits x 2Banks Low Power Synchronous DRAM
IS42VM32100D 512K x 32Bits x 2Banks Low Power Synchronous DRAM
IS42VM32200K 512K x 32Bits x 4Banks Mobile Synchronous DRAM
IS42VM32200M 512K x 32Bits x 4Banks Mobile Synchronous DRAM

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IS42/45VM32160D 4M x 32Bits x 4Banks Mobile Synchronous DRAM Description These IS42/45VM32160D are mobile 536,870,912 bits CMOS Synchronous DRAM organized as 4 banks of 4,194,304 words x 32 bits. These products are offering fully synchronous operation and are referenced to a positive edge of the clock. All inputs and outputs are synchronized with the rising edge of the clock input. The data paths are internally pipelined to achieve very high bandwidth. All input and output voltage levels are compatible with LVCMOS. Features  JEDEC standard 1.
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