Description
at page 6 for each ODT option..
Features
- 2Mx36 and 4Mx18 configuration available.
- On-chip Delay-Locked Loop (DLL) for wide data valid window.
- Separate independent read and write ports with concurrent read and write operations.
- Max. 450 MHz clock for high bandwidth.
- Synchronous pipeline read with EARLY write operation.
- Double Data Rate (DDR) interface for read and write input ports.
- 2.5 Cycle read latency.
- Fixed 2-bit burst for read and write operations.
- Two input clocks (K and K#) fo.
