IS62C25616BL Datasheet | ISSI

IS62C25616BL, IS65C25616BL 256K x 16 HIGH-SPEED CMOS STATIC RAM MARCH 2013 Features - High-speed access time: 45 ns - Low Active Power: 50 m W (typical) - Low Standby Power: 10 m W (typical) CMOS standby - TTL patible interface levels - Single 5V ± 10% power supply - Fully static operation: no clock or refresh required - Package: 44-pin TSOP (Type II) - mercial, Industrial and Automotive temper- ature ranges available - Lead-free available DESCRIPTION The ISSI IS62C25616BL and IS65C25616BL are high- speed, 4,194,304-bit static RAMs organized as 262,144 words by 16 bits. They are fabricated using ISSI's high- performance CMOS technology.This highly reliable process coupled with innovative circuit design techniques, yields access times as fast as 12 ns with low power consumption. When CE is HIGH (deselected), the device assumes a standby mode at which the power dissipation can be reduced down with CMOS input levels. Easy memory expansion is provided by using Chip Enable and Output Enable inputs, CE and OE. The active LOW Write Enable (WE) controls both writing and reading of the memory. A data byte allows Upper Byte (UB) and Lower Byte (LB) access. The IS62C25616BL and IS65C25616BL are packaged in the JEDEC standard 44-pin TSOP (Type II). FUNCTIONAL BLOCK DIAGRAM A0-A17 DECODER 256K x 16 MEMORY ARRAY VDD GND I/O0-I/O7 Lower Byte I/O8-I/O15 Upper Byte I/O DATA CIRCUIT COLUMN I/O CONTROL CIRCUIT Copyright © 2013 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on any published information and before placing orders for...