IS67WVE51216TBLL Datasheet | ISSI

IS66/IS67WVE51216EALL/EBLL/ECLL IS67/IS67WVE51216TALL/TBLL/TCLL 8Mb Async/Page PSRAM NOVEMBER 2015 Overview The IS66/67WVE51216EALL/BLL/CLL and IS66/67WVE51216TALL/BLL/CLL are integrated memory device containing 8Mbit Pseudo Static Random Access Memory using a self-refresh DRAM array organized as 512K words by 16 bits. The device includes several power saving modes : Partial Array Refresh mode where data is retained in a portion of the array and Deep Power Down mode. Both these modes reduce standby current drain. The die has separate power rails, VDDQ and VSSQ for the I/O to be run from a separate power supply from the device core. Features - Asynchronous and page mode interface - Dual voltage rails for optional performance - ALL: VDD 1.7V~1.95V, VDDQ 1.7V~1.95V - BLL: VDD 2.7V~3.6V, VDDQ 2.7V~3.6V - CLL: VDD 1.7V~1.95V, VDDQ 2.7V~3.6V - Page mode read access - Interpage Read access : 60ns, 70ns - Intrapage Read access : 25ns - Low Power Consumption - Asynchronous Operation < 30 m A - Intrapage Read < 23 m A - Standby < 150 u A (max.) - Deep power-down (DPD) - ALL/CLL: < 3µA (Typ) - BLL: < 10µA (Typ) - Low Power Feature - Temperature Controlled Refresh - Partial Array Refresh - Deep power-down (DPD) mode - Operating temperature Range Industrial: -40°C~85°C Automotive A1: -40°C~85°C - Package: 48-ball TFBGA Copyright © 2015 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on any published information and before placing orders for products. Integrated Silicon Solution, Inc. does not remend the use of any of its products in life support applications where the failure or malfunction of the product can reasonably be expected to cause...