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ICS650R-07C Datasheet Networking Clock Source

Manufacturer: Integrated Circuit Systems

Download the ICS650R-07C datasheet PDF. This datasheet also includes the ICS650-07C variant, as both parts are published together in a single manufacturer document.

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Note: The manufacturer provides a single datasheet file (ICS650-07C_IntegratedCircuitSystems.pdf) that lists specifications for multiple related part numbers.

Datasheet Details

Part number ICS650R-07C
Manufacturer Integrated Circuit Systems
File Size 125.35 KB
Description Networking Clock Source
Download ICS650R-07C Download (PDF)

General Description

The ICS650-07C is a low cost, low jitter, high performance clock synthesizer for networking applications.

Using analog Phase-Locked Loop (PLL) techniques, the device accepts a 12.5 MHz or 25.00 MHz clock or fundamental mode crystal input to produce multiple output clocks for networking chips, PCI devices, SDRAM, and ASICs.

The ICS650-07C outputs all have 0 ppm synthesis error.

Overview

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c o m ) PRELIMINARY INFORMATION ICS650-07C Networking Clock.

Key Features

  • Packaged in 20 pin narrow (150 mil) SSOP (QSOP).
  • 12.5 MHz or 25.00 MHz fundamental crystal or clock input.
  • Six output clocks with selectable frequencies.
  • SDRAM frequencies of 67, 83, 100, and 133 MHz.
  • Buffered crystal reference output.
  • Zero ppm synthesis error in all clocks.
  • Ideal for PMC-Sierra’s ATM switch chips.
  • Full CMOS output swing with 25 mA output drive capability at TTL levels.
  • Advanced, low power, sub-mic.

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