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ICS8344-01 - 1-TO-24 DIFFERENTIAL-TO-LVCMOS FANOUT BUFFER

Description

The ICS8344-01 is a low voltage, low skew fanout buffer and a member of the HiPerClockS™ HiPerClockS™ family of High Performance Clock Solutions from ICS.

The ICS8344-01 has two selectable clock inputs.

The CLK0, nCLK0 and CLK1, nCLK1 pairs can accept most standard differential input levels.

Features

  • 24 LVCMOS outputs, 7Ω typical output impedance.
  • 2 selectable CLKx, nCLKx inputs.
  • CLK0, nCLK0 and CLK1, nCLK1 pairs can accept the following input levels: LVDS, LVPECL, LVHSTL, SSTL, HCSL.
  • Output frequency up to 250MHz.
  • Translates any single ended input signal to LVCMOS with resistor bias on nCLK input.
  • Synchronous clock enable.
  • Output skew: 200 ps (maximum).
  • Part-to-part skew: 900ps (maximum).
  • Bank skew: 85ps (maxi.

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Datasheet Details

Part number ICS8344-01
Manufacturer Integrated Circuit Systems
File Size 152.34 KB
Description 1-TO-24 DIFFERENTIAL-TO-LVCMOS FANOUT BUFFER
Datasheet download datasheet ICS8344-01 Datasheet

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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Integrated Circuit Systems, Inc. ICS8344-01 LOW SKEW, 1-TO-24 DIFFERENTIAL-TO-LVCMOS FANOUT BUFFER FEATURES • 24 LVCMOS outputs, 7Ω typical output impedance • 2 selectable CLKx, nCLKx inputs • CLK0, nCLK0 and CLK1, nCLK1 pairs can accept the following input levels: LVDS, LVPECL, LVHSTL, SSTL, HCSL • Output frequency up to 250MHz • Translates any single ended input signal to LVCMOS with resistor bias on nCLK input • Synchronous clock enable • Output skew: 200 ps (maximum) • Part-to-part skew: 900ps (maximum) • Bank skew: 85ps (maximum) • Propagation delay: 5ns (maximum) • 3.3V, 2.5V or mixed 3.3V, 2.
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