ICS9DB102 buffer equivalent, 2 output pci express buffer.
* 2 - 0.7V current mode differential output pairs (HSCL) Key Specifications:
* Cycle-to-cycle jitter < 35ps
* Output-to-output skew < 25 ps Features/Benefits.
* PLL or bypass mode/PLL can dejitter incoming clock
* Selectable PLL bandwidth/minimizes jitter peaking in down.
PIN # 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 PLL_BW CLK_INT CLK_INC **CLKREQ0# VDD GND PCIEXT0 PCIEXC0 VDD SMBDAT SMBCLK VDD PCIEXC1 PCIEXT1 GND VDD **CLKREQ1# PIN NAME PIN TYPE IN IN IN IN PWR PWR OUT OUT PWR I/O IN PWR OUT OUT PWR PWR IN DESCRIP.
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