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ICS9FG1904B-1 - Frequency Generator

Features

  • Power up default is all outputs in 1:1 mode.
  • DIF_(14:0) can be “gear-shifted” from the input CPU Host Clock.
  • DIF_(18:15) can be “gear-shifted” from the input CPU Host Clock.
  • Spread spectrum compatible.
  • Supports output clock frequencies up to 400 MHz.
  • 8 Selectable SMBus addresses.
  • SMBus address determines PLL or Bypass mode Key Specifications:.
  • DIF output cycle-to-cycle jitter < 50ps.
  • DIF output-to-output skew < 10.

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Datasheet Details

Part number ICS9FG1904B-1
Manufacturer Integrated Circuit Systems
File Size 217.97 KB
Description Frequency Generator
Datasheet download datasheet ICS9FG1904B-1 Datasheet

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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Integrated Circuit Systems, Inc. ICS9FG1904B-1 Frequency Generator for CPU, PCIe Gen 1, PCIe Gen 2 & FBD Recommended Application: DB1900GS/GSO with 15:4 output grouping Features: • Power up default is all outputs in 1:1 mode • DIF_(14:0) can be “gear-shifted” from the input CPU Host Clock • DIF_(18:15) can be “gear-shifted” from the input CPU Host Clock • Spread spectrum compatible • Supports output clock frequencies up to 400 MHz • 8 Selectable SMBus addresses • SMBus address determines PLL or Bypass mode Key Specifications: • DIF output cycle-to-cycle jitter < 50ps • DIF output-to-output skew < 100ps within a group Functionality at Power Up (PLL Mode) FS_A_4101 1 0 CLK_IN (CPU FSB) MHz 100 <= CLK_IN < 200 200<= CLK_IN <= 400 DIF_(18:0) MHz CLK_IN CLK_IN 1.
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