IDT74FCT388915T100 (3-state) equivalent, 3.3v low skew pll-based cmos clock driver with (3-state).
FUNCTIONAL BLOCK DIAGRAM
FEEDBACK Phase/Freq. Detector Voltage Controlled Oscilator LF REF_SEL PLL_EN 0 1 Mux 2Q (÷ 1) (÷ 2) 1M u x 0
D Q
LOCK 0M u 1x Charge Pump
SYN.
RST is low, all the outputs are put in high impedance state and The IDT54/74FCT388915T uses phase-lock loop technol- registers at Q, Q and Q/2 outputs are reset. ogy to lock the frequency and phase of outputs to the input The IDT54/74FCT388915T requ.
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