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IDT74FCT388915T70

3.3V LOW SKEW PLL-BASED CMOS CLOCK DRIVER WITH (3-STATE)

IDT74FCT388915T70 Features

* FUNCTIONAL BLOCK DIAGRAM FEEDBACK Phase/Freq. Detector Voltage Controlled Oscilator LF REF_SEL PLL_EN 0 1 Mux 2Q (÷ 1) (÷ 2) 1M u x 0 D Q LOCK 0M u 1x Charge Pump SYNC (0) SYNC (1) Q0 Q1 Divide -By-2 FREQ_SEL OE/RST CP R Q D CP R D CP R D CP D CP D CP D CP R 3052 drw 01 R R R Q Q Q2 Q Q3

IDT74FCT388915T70 General Description

RST is low, all the outputs are put in high impedance state and The IDT54/74FCT388915T uses phase-lock loop technol- registers at Q, Q and Q/2 outputs are reset. ogy to lock the frequency and phase of outputs to the input The IDT54/74FCT388915T requires one external loop filter reference clock. It .

IDT74FCT388915T70 Datasheet (145.69 KB)

Preview of IDT74FCT388915T70 PDF

Datasheet Details

Part number:

IDT74FCT388915T70

Manufacturer:

Integrated Device Technology

File Size:

145.69 KB

Description:

3.3v low skew pll-based cmos clock driver with (3-state).
IDT54/74FCT388915T 70/100/133/150 3.3V LOW SKEW PLL-BASED CLOCK DRIVER MILITARY AND COMMERCIAL TEMPERATURE RANGES Integrated Device Technology, Inc..

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TAGS

IDT74FCT388915T70 3.3V LOW SKEW PLL-BASED CMOS CLOCK DRIVER WITH 3-STATE Integrated Device Technology

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