IS64WV51216BLL Datasheet | ISSI

IS61WV51216ALL IS61WV51216BLL IS64WV51216BLL 512K x 16 HIGH-SPEED ASYNCHRONOUS CMOS STATIC RAM WITH 3.3V SUPPLY OCTOBER 2009 Features - High-speed access times: 8, 10, 20 ns - High-performance, low-power CMOS process - Multiple center power and ground pins for greater noise immunity - Easy memory expansion with CE and OE op- tions - CE power-down - Fully static operation: no clock or refresh required - TTL patible inputs and outputs - Single power supply VDD 1.65V to 2.2V (IS61WV51216ALL) speed = 20ns for VDD 1.65V to 2.2V VDD 2.4V to 3.6V (IS61/64WV51216BLL) speed = 10ns for VDD 2.4V to 3.6V speed = 8ns for VDD 3.3V + 5% - Packages available: - 48-ball mini BGA (9mm x 11mm) - 44-pin TSOP (Type II) - Industrial and Automotive Temperature Support - Lead-free available - Data control for upper and lower bytes FUNCTIONAL BLOCK DIAGRAM DESCRIPTION The ISSI IS61WV51216ALL/BLL and IS64WV51216BLL are high-speed, 8M-bit static RAMs organized as 512K words by 16 bits. It is fabricated using ISSI's high-perform- ance CMOS technology. This highly reliable process coupled with innovative circuit design techniques, yields high-performance and low power consumption devices. When CE is HIGH (deselected), the device assumes a standby mode at which the power dissipation can be reduced down with CMOS input levels. Easy memory expansion is provided by using Chip Enable and Output Enable inputs, CE and OE. The active LOW Write Enable (WE) controls both writing and reading of the memory. A data byte allows Upper Byte (UB) and Lower Byte (LB) access. The device is packaged in the JEDEC standard 44-pin TSOP Type II and 48-pin Mini BGA (9mm x 11mm). A0-A18 DECODER 512K x 16 MEMORY ARRAY VDD GND I/O0-I/O7 Lower...