Datasheet Summary
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Intel StrataFlash£ Wireless Memory System (LV18/LV30 SCSP)
768-Mbit LVQ Family with Asynchronous Static RAM
Product Features
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- Device Architecture
- xRAM Performance
- Code and data segment: 128- and 256- PSRAM at 1.8 V I/O : 85 ns initial Mbit density; PSRAM: 32- and 64-Mbit access, 30 ns async page reads; 65 ns density; SRAM: 8 Mbit density. initial access, 18 ns async page.
- Top or bottom parameter configuration.
- SRAM at 1.8 or 3.0 V I/O: 70 ns initial access.
- Asymmetrical blocking structure.
- Flash Performance
- 16-KWord parameter blocks (Top or
- Code Segment at 1.8 V I/O: 85 ns initial Bottom); 64-K Word main blocks. access; 25 ns...