C5002 Datasheet - International

Low Skew Muliple Frequency PCI Clock Generator with EMI Reducing SSCG

C5002 Features

* Produces PCI output clocks that are individually selectable for 33.3 or 66.6 MHz under SMBus or strapping control. Separate output buffer power supply for reduced noise, crosstalk and jitter. input clock frequency standard 14.31

C5002 General Description

Pin Number 2 Pin Name XIN PWR VDDA I/O I Description This pin is the connection point for the devices Loop reference frequency. This may be either a CMOS 3.3 volt reference clock or the output of an external crystal. A nominal 14.31818 MHz frequency must be supplied to obtain the frequencies listed .

C5002 Datasheet (127.01 KB)

C5002 Datasheet Preview — Preview of C5002 PDF

Datasheet Details

Part number:

C5002

Manufacturer:

International

File Size:

127.01 KB

Description:

Low skew muliple frequency pci clock generator with emi reducing sscg.

📁 Related Datasheet

C5000 2SC5000 (Toshiba Semiconductor)

C5001 Low Skew Muliple Frequency PCI Clock Generator with EMI Reducing SSCG (International)

C5002 2SC5002 (Sanken electric)

C5002 2SC5002 (SavantIC)

C5002 Low Skew Multiple Frequency PCI Clock Generator (Cypress)

C501 8-Bit Single-Chip Microcontroller (Siemens)

C5012 2SC5012 (NEC)

C5019 Silicon NPN Transistor (Panasonic)

C502 8-Bit CMOS Microcontroller (Siemens)

C502 PCI Dual Port Sync Board Manual (Moxa)

TAGS

C5002 Low Skew Muliple Frequency PCI Clock Generator with EMI Reducing SSCG International

Image Gallery

C5002 Features

C5002 General Description

Datasheet Details

File Size:

Description:

C5002 Distributor