75339G Datasheet | Intersil

Features - 75A, 55V - Simulation Models - Temperature pensated PSPICE® and SABER© Models - SPICE and SABER Thermal Impedance Models Available on the WEB at: .Intersil./families/models.htm - Peak Current vs Pulse Width Curve - UIS Rating Curve - Related Literature - TB334, “Guidelines for Soldering Surface Mount ponents to PC Boards” Symbol JEDEC TO-220AB DRAIN (FLANGE) SOURCE DRAIN GATE DRAIN (TAB) JEDEC TO-263AB GATE SOURCE DRAIN (FLANGE) CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures. Ultra FET™ is a trademark of Intersil Corporation. PSPICE® is a registered trademark of Micro Sim Corporation. SABER© is a Copyright of Analogy, Inc. http://.intersil. or 407-727-9207 | Copyright © Intersil Corporation 1999 HUF75339G3, HUF75339P3, HUF75339S3S Absolute Maximum Ratings TC = 25o C, Unless Otherwise Specified UNITS Drain to Source Voltage (Note 1) - - - - - - - - . . . VDSS Drain to Gate Voltage (RGS = 20kΩ) (Note 1) - - - - - - . . . VDGR Gate to Source Voltage -...