HCTS132MS
HCTS132MS is Radiation Hardened Quad 2-Input NAND Schmitt Trigger manufactured by Intersil.
Features
- 3 Micron Radiation Hardened SOS CMOS
- Total Dose 200K RAD (Si)
- SEP Effective LET No Upsets: >100 MEV-cm2/mg
- Single Event Upset (SEU) Immunity < 2 x 10-9 Errors/Bit-Day (Typ)
- Dose Rate Survivability: >1 x 1012 RAD (Si)/s
- Dose Rate Upset >10
RAD (Si)/s 20ns Pulse
- Latch-Up Free Under Any Conditions
- Military Temperature Range: -55o C to +125o C
- Significant Power Reduction pared to LSTTL ICs
- DC Operating Voltage Range: 4.5V to 5.5V
- LSTTL Input patibility
- VIL = 0.8V Max
- VIH = VCC/2 Min
- Input Current Levels Ii ≤ 5µA at VOL, VOH
14 LEAD CERAMIC METAL SEAL FLATPACK PACKAGE (FLATPACK) MIL-STD-1835 CDFP3-F14 TOP VIEW
A1 B1 Y1 A2 B2 Y2 GND 1 2 3 4 5 6 7 14 13 12 11 10 9 8 VCC B4 A4 Y4 B3 A3 Y3
Description
The Intersil HCTS132MS is a Radiation Hardened Quad 2-Input NAND Schmitt Trigger inputs. A high on both inputs forces the output to a Low state. The HCTS132MS utilizes advanced CMOS/SOS technology to achieve high-speed operation. This device is a member of radiation hardened, high-speed, CMOS/SOS Logic Family. The HCTS132MS is supplied in a 14 lead Ceramic flatpack (K suffix) or a SBDIP Package (D suffix).
TRUTH TABLE INPUTS OUTPUTS Bn L H L H Yn H H H L
Ordering Information
PART NUMBER HCTS132DMSR TEMPERATURE RANGE -55o C to +125o C SCREENING LEVEL Intersil Class S Equivalent Intersil Class S Equivalent PACKAGE 14 Lead SBDIP
An L L H H 14 Lead Ceramic Flatpack 14 Lead SBDIP n A (1, 4, 9, 12)
HCTS132KMSR
-55o C to +125o C
NOTE: L = Logic Level Low, H = Logic level High
Functional Diagram
HCTS132D/ Sample HCTS132K/ Sample
+25o C
Sample
+25o C
Sample
14 Lead Ceramic Flatpack Die n Y (3, 6, 8, 11) n O (2, 5, 10, 13)
HCTS132HMSR
+25o C
Die
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. http://.intersil. or 407-727-9207 | Copyright © Intersil Corporation 1999
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