HCTS138MS Datasheet | Intersil

Features - 3 Micron Radiation Hardened SOS CMOS - Total Dose 200K RAD (Si) - SEP Effective LET No Upsets: >100 MEV-cm2/mg - Single Event Upset (SEU) Immunity < 2 x 10-9 Errors/ Bit-Day (Typ) - Dose Rate Survivability: >1 x 1012 RAD (Si)/s - Dose Rate Upset >1010 RAD (Si)/s 20ns Pulse - Latch-Up Free Under Any Conditions - Fanout (Over Temperature Range) - Bus Driver Outputs - 15 LSTTL Loads - Military Temperature Range: -55o C to +125o C - Significant Power Reduction pared to LSTTL ICs - DC Operating Voltage Range: 4.5V to 5.5V - LSTTL Input patibility - VIL = 0.8V Max - VIH = VCC/2 Min - Input Current Levels Ii ≤ 5µA at VOL, VOH E3 Y7 GND 16 LEAD CERAMIC METAL SEAL FLATPACK PACKAGE (FLATPACK) MIL-STD-1835 CDFP4-F16 TOP VIEW A0 A1 A2 E1 E2 E3 Y7 GND 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 VCC Y0 Y1 Y2 Y3 Y4 Y5 Y6 Description The Intersil HCTS138MS is a Radiation Hardened 3-to-8 line Decoder/Demultiplexer. The outputs are active in the low state. Two active low and one active high enables (E1, E2, E3) are provided. If the device is enabled, the binary inputs (A0, A1, A2) determine which one of the eight normally high outputs will go to a low logic level. The HCTS138MS utilizes advanced CMOS/SOS technology to achieve high-speed operation. This device is a member of radiation hardened, high-speed, CMOS/SOS Logic Family. The HCTS138MS is supplied in a 16 lead Ceramic flatpack (K suffix) or a SBDIP Package (D suffix). Ordering Information PART NUMBER HCTS138DMSR HCTS138KMSR HCTS138D/Sample HCTS138K/Sample HCTS138HMSR TEMPERATURE RANGE -55o C to +125o C -55o C to +125o C +25o C +25o C +25o C SCREENING LEVEL Intersil Class S Equivalent Intersil Class S Equivalent Sample Sample Die PACKAGE 16 Lead SBDIP 16 Lead Ceramic Flatpack 16 Lead SBDIP 16 Lead Ceramic Flatpack Die DB NA CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999 Spec Number File...