X5043 supervisor equivalent, (x5043 / x5045) cpu supervisor.
a Serial Peripheral Interface (SPI) and software protocol allowing operation on a simple four-wire bus. The device utilizes Intersil’s proprietary Direct Write™ cell, pro.
requiring higher precision. The memory portion of the device is a CMOS Serial EEPROM array with Intersil’s block lock pr.
Chip Select Input Serial Output Serial Input Serial Clock Input Write Protect Input Ground Supply Voltage Reset Output
Pin Descriptions
Serial Output (SO)
SO is a push/pull serial data.
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