MD56V62160E Datasheet | LAPIS

4-Bank  1,048,576-Word  16-Bit SYNCHRONOUS DYNAMIC RAM FEDD56V62160E-07 Issue Date: Nov. 18, 2013 DESCRIPTION The MD56V62160E is a 4-Bank  1,048,576-word  16-bit Synchronous dynamic RAM fabricated in LAPIS Semiconductor’s silicon-gate CMOS technology. The device operates at 3.3 V. The inputs and outputs are LVTTL patible. Features - Silicon gate, quadruple poly-silicon CMOS, 1-transistor memory cell - 4-Bank  1,048,576-word  16-bit configuration - Single 3.3 V power supply, 0.3 V tolerances - Input : LVTTL patible - Output : LVTTL patible - Refresh : 4096 cycles/64 ms - Programmable data transfer mode - CAS Latency (2, 3) - Burst Length (1, 2, 4, 8, Full Page)...