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ISPPAC30 - In-System Programmable Analog Circuit

Description

The ispPAC®30 is a member of the Lattice family of InSystem Programmable (ISP™) analog integrated circuits.

It is digitally configured via SRAM and utilizes E2CMOS memory for non-volatile storage of its configuration.

Features

  • Flexible Interface and Programming Control.
  • Full configuration capability, SPI or JTAG modes Unlimited device updates using SRAM register E2CMOS® for non-volatile configuration storage Real-time microcontroller configuration/control High impedance: differential or single-ended 0V to 2.8V with programmable gains (±1 to ±10) Dual multiplexers (pin or serial port controlled) Connects easily to existing system circuits Functional Block Diagram IN1+ 13 Vref.

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Datasheet Details

Part number ISPPAC30
Manufacturer Lattice Semiconductor
File Size 1.17 MB
Description In-System Programmable Analog Circuit
Datasheet download datasheet ISPPAC30 Datasheet

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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www.DataSheet4U.com ispPAC30 In-System Programmable Analog Circuit October 2002 Data Sheet Features ■ Flexible Interface and Programming Control • • • • Full configuration capability, SPI or JTAG modes Unlimited device updates using SRAM register E2CMOS® for non-volatile configuration storage Real-time microcontroller configuration/control High impedance: differential or single-ended 0V to 2.
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