Download SY54020AR Datasheet PDF
SY54020AR page 2
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SY54020AR Description

The SY54020AR is a fully differential, low voltage 1.2V/1.8V/2.5V CML 1:4 Fanout Buffer with active-low Enable (/EN). The Enable is synchronous so that the outputs will only be enabled/disabled when they are already in the LOW state. This avoids any chance of generating a runt clock pulse when the device is enabled/disabled as can happen with an asynchronous control.

SY54020AR Key Features

  • 1.2V/1.8V/2.5V CML 1:4 Fanout Buffer
  • Active-low Enable (/EN) input to disable the outputs
  • Guaranteed AC performance over temperature and voltage
  • DC-to > 3.2Gbps Data throughput
  • DC-to > 3.2GHz Clock throughput
  • <320 ps propagation delay (IN-to-Q)
  • <20ps within-device skew
  • <100 ps rise/fall times
  • Ultra-low jitter design
  • <1psRMS cycle-to-cycle jitter