SY100ELT23 translator equivalent, dual differential pecl-to-ttl translator.
* 3.0 ns Typical Propagation Delay
* <300 ps Typical Within-Device Skew
* Differential PECL Inputs
* 24 mA TTL Outputs
* Flow-Through Pinouts
* In.
that require the translation of a clock or data signal.
The ELT23 is compatible with positive ECL 100K logic levels.
Pa.
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